Sciweavers

196 search results - page 29 / 40
» MPIAB: A Novel Agent Architecture for Parallel Processing
Sort
View
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 1 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
FGCS
2007
160views more  FGCS 2007»
13 years 7 months ago
Distributed data mining in grid computing environments
The computing-intensive data mining for inherently Internet-wide distributed data, referred to as Distributed Data Mining (DDM), calls for the support of a powerful Grid with an e...
Ping Luo, Kevin Lü, Zhongzhi Shi, Qing He
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 12 days ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
HPCC
2009
Springer
14 years 2 days ago
A Study of Bare PC Web Server Performance for Workloads with Dynamic and Static Content
—Bare PC applications do not use an operating system or kernel. The bare PC architecture avoids buffer copying, minimizes interrupts, uses a single thread of execution for proces...
Long He, Ramesh K. Karne, Alexander L. Wijesinha, ...
EUROSYS
2007
ACM
13 years 9 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...