308 search results - page 13 / 62 » Macromodeling of analog circuits for hierarchical circuit de... |
ATS
2009
IEEE
14 years 2 months ago
2009
IEEE
—A method of testing for parametric faults of analog circuits based on a polynomial representation of fault-free function of the circuit is presented. The response of the circuit...
DAC
2003
ACM
14 years 20 days ago
2003
ACM
A new methodology is presented to solve a strongly nonlinear circuit, characterized by Piece-Wise Linear (PWL) functions, symbolically and explicitly in terms of its circuit param...
VLSID
2010
IEEE
13 years 11 months ago
2010
IEEE
We propose a method for diagnosis of parametric faults in analog circuits using polynomial coefficients of the circuit model [15]. As a sequel to our recent work [14], where circ...
DATE
2000
IEEE
13 years 11 months ago
2000
IEEE
This paper presents a methodology towards synthesis of high performance analog circuits. Layout parasitics are estimated and compensated during circuit sizing. Physical layout con...
EH
2004
IEEE
13 years 11 months ago
2004
IEEE
This work deals with the design of analog circuits for Artificial Neural Networks (ANNs) controllers using an Evolvable Hardware (EHW) platform. ANNs are massively parallel system...