308 search results - page 17 / 62 » Macromodeling of analog circuits for hierarchical circuit de... |
ISQED
2000
IEEE
2000
IEEE
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
13 years 11 months ago
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
We present techniques for improving the accuracy of geometric-programming (GP) based analog circuit design optimization. We describe major sources of discrepancies between the res...
SBCCI
2006
ACM
14 years 1 months ago
2006
ACM
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
DATE
2002
IEEE
14 years 11 days ago
2002
IEEE
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...
EVOW
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. We motivate and describe an analog evolvable hardware design platform named GRACE (i.e. Generative Robust Analog Circuit Exploration). GRACE combines coarse-grained, topo...