308 search results - page 53 / 62 » Macromodeling of analog circuits for hierarchical circuit de... |
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Capacitance extraction is an important problem that has been extensively studied. This paper presents a significant improvement for the fast multipole accelerated boundary element...
VLSID
2004
IEEE
14 years 7 months ago
2004
IEEE
This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competit...
ISCAS
2003
IEEE
14 years 20 days ago
2003
IEEE
Spatial image processing chips, known as silicon retinas, are based on the architecture of vertebrate retina and can be mathematically represented as the Laplacian of Gaussian (LO...
TCAD
2008
13 years 7 months ago
2008
Abstract--A key design constraint of circuits used in handheld devices is the power consumption, mainly due to battery life limitations. Adaptive power management (APM) techniques ...