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ITC
1995
IEEE
122views Hardware» more  ITC 1995»
14 years 21 days ago
A Fault Model and a Test Method for Analog Fuzzy Logic Circuits
A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits ...
Stefan Weiner
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
14 years 3 months ago
Memory mapped ECC: low-cost error protection for last level caches
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
Doe Hyun Yoon, Mattan Erez
CCS
2009
ACM
14 years 4 months ago
Learning your identity and disease from research papers: information leaks in genome wide association study
Genome-wide association studies (GWAS) aim at discovering the association between genetic variations, particularly single-nucleotide polymorphism (SNP), and common diseases, which...
Rui Wang, Yong Fuga Li, XiaoFeng Wang, Haixu Tang,...
DIM
2005
ACM
13 years 11 months ago
Pseudonym management using mediated identity-based cryptography
Mobile Location-Based Services (LBS) have raised privacy concerns amongst mobile phone users who may need to supply their identity and location information to untrustworthy third ...
Thibault Candebat, Cameron Ross Dunne, David T. Gr...
ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
14 years 1 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri