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135
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DAC
2003
ACM
16 years 4 months ago
Support vector machines for analog circuit performance representation
The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parame...
Fernando De Bernardinis, Michael I. Jordan, Albert...
129
Voted
ICML
2006
IEEE
16 years 4 months ago
Iterative RELIEF for feature weighting
RELIEF is considered one of the most successful algorithms for assessing the quality of features. In this paper, we propose a set of new feature weighting algorithms that perform s...
Yijun Sun, Jian Li
118
Voted
ICCAD
2004
IEEE
101views Hardware» more  ICCAD 2004»
16 years 17 days ago
Frugal linear network-based test decompression for drastic test cost reductions
— In this paper we investigate an effective approach to construct a linear decompression network in the multiple scan chain architecture. A minimal pin architecture, complemented...
Wenjing Rao, Alex Orailoglu, G. Su
122
Voted
FPGA
2010
ACM
276views FPGA» more  FPGA 2010»
16 years 16 days ago
Accelerating Monte Carlo based SSTA using FPGA
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, K...
117
Voted
ACSAC
2009
IEEE
15 years 10 months ago
Online Sketching of Network Flows for Real-Time Stepping-Stone Detection
Abstract—We present an efficient and robust stepping-stone detection scheme based on succinct packet-timing sketches of network flows. The proposed scheme employs an online alg...
Baris Coskun, Nasir D. Memon