56 search results - page 3 / 12 » Maximum power estimation for CMOS circuits using determinist... |
ISLPED
1995
ACM
13 years 10 months ago
1995
ACM
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
DATE
1997
IEEE
13 years 11 months ago
1997
IEEE
: In this paper, we present a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level...
TIM
2010
13 years 1 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these ...