56 search results - page 4 / 12 » Maximum power estimation for CMOS circuits using determinist... |
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
TCAD
1998
13 years 6 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
TON
2010
13 years 1 months ago
2010
Abstract--Received power measurements at spatially distributed monitors can be usefully exploited to deduce various characteristics of active wireless transmitters. In this paper, ...
ISCAS
2005
IEEE
14 years 18 days ago
2005
IEEE
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...