117 search results - page 5 / 24 » Memory Access Schemes for Configurable Processors |
PDPTA
2003
13 years 9 months ago
2003
The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...
ISVLSI
2003
IEEE
14 years 29 days ago
2003
IEEE
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
INFOCOM
1998
IEEE
13 years 12 months ago
1998
IEEE
Increased bandwidth in the Internet puts great demands on network routers; for example, to route minimum sized Gigabit Ethernet packets, an IP router must process about packets pe...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...