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ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 5 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
11 years 10 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
CASES
2003
ACM
14 years 1 months ago
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-m...
Sumesh Udayakumaran, Rajeev Barua
HPCA
2004
IEEE
14 years 8 months ago
Accurate and Complexity-Effective Spatial Pattern Prediction
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas ...
ICCAD
2003
IEEE
131views Hardware» more  ICCAD 2003»
14 years 4 months ago
LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches
Leakage energy will be the major energy consumer in future deep sub-micron designs. Especially the memory sub-system of future SOCs will be negatively affected by this trend. In o...
Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel