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» Memory Exploration for Low Power, Embedded Systems
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ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
14 years 28 days ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
ANSOFT
2002
126views more  ANSOFT 2002»
13 years 7 months ago
The Real-Time Process Algebra (RTPA)
Abstract. The real-time process algebra (RTPA) is a set of new mathematical notations for formally describing system architectures, and static and dynamic behaviors. It is recogniz...
Yingxu Wang
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
13 years 11 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri
AAAI
2004
13 years 9 months ago
Visual Odometry Using Commodity Optical Flow
A wide variety of techniques for visual navigation using robot-mounted cameras have been described over the past several decades, yet adoption of optical flow navigation technique...
Jason Campbell, Rahul Sukthankar, Illah R. Nourbak...