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» Memory Exploration for Low Power, Embedded Systems
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DATE
2008
IEEE
117views Hardware» more  DATE 2008»
14 years 2 months ago
Architecture Exploration of NAND Flash-based Multimedia Card
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
Sungchan Kim, Chanik Park, Soonhoi Ha
RTSS
2009
IEEE
14 years 2 months ago
Multi-Channel Interference Measurement and Modeling in Low-Power Wireless Networks
Abstract—Multi-channel design has received significant attention for low-power wireless networks (LWNs), such as 802.15.4-based wireless sensor networks, due to its potential of...
Guoliang Xing, Mo Sha, Jun Huang, Gang Zhou, Xiaor...
DATE
2007
IEEE
150views Hardware» more  DATE 2007»
14 years 2 months ago
A low-SER efficient core processor architecture for future technologies
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...
ISQED
2010
IEEE
176views Hardware» more  ISQED 2010»
13 years 6 months ago
A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead
Low power, minimum transistor count and fast access static random access memory (SRAM) is essential for embedded multimedia and communication applications realized using system on...
Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dh...
CODES
2002
IEEE
14 years 23 days ago
Energy savings through compression in embedded Java environments
Limited energy and memory resources are important constraints in the design of an embedded system. Compression is an useful and widely employed mechanism to reduce the memory requ...
Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijayk...