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» Memory Exploration for Low Power, Embedded Systems
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JTRES
2010
ACM
13 years 8 months ago
WCET driven design space exploration of an object cache
In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led...
Benedikt Huber, Wolfgang Puffitsch, Martin Schoebe...
ARCS
2009
Springer
14 years 2 months ago
Ultra-Fast Downloading of Partial Bitstreams through Ethernet
Abstract. In this paper we present a partial bitstreams ultra-fast downloading process through a standard Ethernet network. These Virtex-based and partially reconfigurable systems...
Pierre Bomel, Jeremie Crenne, Linfeng Ye, Jean-Phi...
RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
14 years 1 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
CASES
2007
ACM
13 years 11 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov
CASES
2003
ACM
13 years 11 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna