745 search results - page 93 / 149 » Memory Exploration for Low Power, Embedded Systems |
120
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ETS
2007
IEEE
15 years 5 months ago
2007
IEEE
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
146
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GLVLSI
2010
IEEE
15 years 5 months ago
2010
IEEE
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
135
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ASPLOS
2011
ACM
14 years 6 months ago
2011
ACM
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
137
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JCP
2007
15 years 3 months ago
2007
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
102
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IMS
2000
15 years 6 months ago
2000
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...