276 search results - page 17 / 56 » Memory Organization for Improved Data Cache Performance in E... |
CASES
2010
ACM
13 years 5 months ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
DSD
2008
IEEE
13 years 9 months ago
2008
IEEE
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access ...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...