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GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
14 years 18 hour ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
DAC
2009
ACM
14 years 7 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
DSN
2004
IEEE
13 years 10 months ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
DAC
2006
ACM
14 years 21 days ago
Hierarchical power distribution and power management scheme for a single chip mobile processor
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
Toshihiro Hattori, Takahiro Irita, Masayuki Ito, E...
PPL
2008
185views more  PPL 2008»
13 years 6 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...