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IMS
2000
123views Hardware» more  IMS 2000»
13 years 10 months ago
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
David Judd, Katherine A. Yelick, Christoforos E. K...
DAC
2008
ACM
14 years 7 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu
ESTIMEDIA
2005
Springer
14 years 8 days ago
Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
Manish Verma, Klaus Petzold, Lars Wehmeyer, Heiko ...
ICCD
2000
IEEE
124views Hardware» more  ICCD 2000»
14 years 3 months ago
Processors for Mobile Applications
: Mobile processors form a large and very fast growing segment of semiconductor market. Although they are used in a great variety of embedded systems such as personal digital organ...
Farinaz Koushanfar, Miodrag Potkonjak, Vandana Pra...
ERSA
2004
134views Hardware» more  ERSA 2004»
13 years 8 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner