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MICRO
2008
IEEE
92views Hardware» more  MICRO 2008»
14 years 5 months ago
Online design bug detection: RTL analysis, flexible mechanisms, and evaluation
Higher level of resource integration and the addition of new features in modern multi-processors put a significant pressure on their verification. Although a large amount of res...
Kypros Constantinides, Onur Mutlu, Todd M. Austin
MICRO
2008
IEEE
148views Hardware» more  MICRO 2008»
14 years 5 months ago
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...
Ramazan Bitirgen, Engin Ipek, José F. Mart&...
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
14 years 3 months ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin
MICRO
2011
IEEE
193views Hardware» more  MICRO 2011»
13 years 2 months ago
Voltage Noise in Production Processors
Abstract—Parameter variations have become a dominant challenge in microprocessor design. Voltage variation is especially daunting because it happens so rapidly. We measure and ch...
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Si...
NIPS
2007
14 years 11 days ago
An in-silico Neural Model of Dynamic Routing through Neuronal Coherence
We describe a neurobiologically plausible model to implement dynamic routing using the concept of neuronal communication through neuronal coherence. The model has a three-tier arc...
Devarajan Sridharan, Brian Percival, John V. Arthu...