232 search results - page 42 / 47 » MicroNetwork-Based Integration for SOCs |
DAC
2003
ACM
14 years 20 days ago
2003
ACM
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
ISLPED
2003
ACM
14 years 20 days ago
2003
ACM
We introduce and analyze the ground bounce due to power mode transition in power gating structures. To reduce the ground bounce, we propose novel power gating structures in which ...
ATS
2009
IEEE
14 years 16 days ago
2009
IEEE
Caches are crucial components in modern processors (both stand-alone or integrated into SoCs) and their test is a challenging task, especially when addressing complex and high-fre...
ISSS
2002
IEEE
14 years 10 days ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
GLVLSI
2002
IEEE
14 years 11 days ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...