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ISPASS
2009
IEEE
14 years 2 months ago
Analyzing CUDA workloads using a detailed GPU simulator
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, He...
MICRO
2008
IEEE
118views Hardware» more  MICRO 2008»
14 years 1 months ago
Notary: Hardware techniques to enhance signatures
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
Luke Yen, Stark C. Draper, Mark D. Hill
ISSTA
2010
ACM
13 years 11 months ago
On test repair using symbolic execution
When developers change a program, regression tests can fail not only due to faults in the program but also due to outof-date test code that does not reflect the desired behavior ...
Brett Daniel, Tihomir Gvero, Darko Marinov
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
14 years 12 days ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...
DATE
2009
IEEE
168views Hardware» more  DATE 2009»
14 years 2 months ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...