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VTS
2000
IEEE
89views Hardware» more  VTS 2000»
14 years 7 days ago
Fault Escapes in Duplex Systems
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
Subhasish Mitra, Nirmal R. Saxena, Edward J. McClu...
VLSID
1996
IEEE
110views VLSI» more  VLSID 1996»
14 years 12 hour ago
On test coverage of path delay faults
W epropose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and ...
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...
ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
13 years 12 months ago
Optimization of critical paths in circuits with level-sensitive latches
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
Timothy M. Burks, Karem A. Sakallah
DMSN
2007
ACM
13 years 11 months ago
SenseSwarm: a perimeter-based data acquisition framework for mobile sensor networks
This paper assumes a set of n mobile sensors that move in the Euclidean plane as a swarm1 . Our objectives are to explore a given geographic region by detecting and aggregating sp...
Demetrios Zeinalipour-Yazti, Panayiotis Andreou, P...
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
13 years 11 months ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
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