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ICCAD
1997
IEEE
118views Hardware» more  ICCAD 1997»
13 years 12 months ago
Global interconnect sizing and spacing with consideration of coupling capacitance
This paper presents an efficient approach to perform global interconnect sizing and spacing (GISS) for multiple nets to minimize interconnect delays with consideration of couplin...
Jason Cong, Lei He, Cheng-Kok Koh, David Zhigang P...
ISLPED
1997
ACM
108views Hardware» more  ISLPED 1997»
13 years 12 months ago
Techniques for low energy software
The energy consumption of a system depends upon the hardware and software component of a system. Since it is the software which drives the hardware in most systems, decisions take...
Huzefa Mehta, Robert Michael Owens, Mary Jane Irwi...
DDECS
2007
IEEE
90views Hardware» more  DDECS 2007»
13 years 11 months ago
Test Pattern Generator for Delay Faults
A method of generating test pairs for the delay faults is presented in this paper. The modification of the MISR register gives the source of test pairs. The modification of this r...
Tomasz Rudnicki, Andrzej Hlawiczka
EMSOFT
2009
Springer
13 years 11 months ago
Modular static scheduling of synchronous data-flow networks: an efficient symbolic representation
This paper addresses the question of producing modular sequential imperative code from synchronous data-flow networks. Precisely, given a system with several input and output flow...
Marc Pouzet, Pascal Raymond
CSMR
2004
IEEE
13 years 11 months ago
Supporting Architectural Restructuring by Analyzing Feature Models
In order to lower the risk, reengineering projects aim at high reuse rates. Therefore, tasks like architectural restructuring have to be performed in a way that developed new syst...
Ilian Pashov, Matthias Riebisch, Ilka Philippow
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