5506 search results - page 836 / 1102 » Minimal Logic Programs |
111
Voted
ICCD
2004
IEEE
15 years 11 months ago
2004
IEEE
In this paper, we investigate the core-switch mapping(CSM) problem that optimally maps cores onto an NoC architecture such that either the energy consumption or the congestion is ...
109
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ICCAD
2008
IEEE
15 years 11 months ago
2008
IEEE
Abstract—Buffer resizing and buffer insertion are two transformation techniques for the performance optimization of elastic systems. Different approaches for each technique have ...
132
Voted
ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
126
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ICCAD
2001
IEEE
15 years 11 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
125
Voted
ICCAD
2001
IEEE
15 years 11 months ago
2001
IEEE
This paper hierarchically constructs a hybrid mesh/tree clock network structure consisting of overlying zero-skew clock meshes, with underlying zero-skew clock trees originating f...