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SAS
2009
Springer
281views Formal Methods» more  SAS 2009»
14 years 8 months ago
A Verifiable, Control Flow Aware Constraint Analyzer for Bounds Check Elimination
The Java programming language requires that out-of-bounds array accesses produce runtime exceptions. In general, this requires a dynamic bounds check each time an array element is...
David Niedzielski, Jeffery von Ronne, Andreas Gamp...
VLSID
2004
IEEE
125views VLSI» more  VLSID 2004»
14 years 8 months ago
Energy-Optimizing Source Code Transformations for OS-driven Embedded Software
The increasing software content of battery-powered embedded systems has fueled much interest in techniques for developing energyefficient embedded software. Source code transforma...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
ASPLOS
2010
ACM
14 years 3 months ago
Shoestring: probabilistic soft error reliability on the cheap
Aggressive technology scaling provides designers with an ever increasing budget of cheaper and faster transistors. Unfortunately, this trend is accompanied by a decline in individ...
Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott ...
HPCA
2009
IEEE
14 years 3 months ago
Reconciling specialization and flexibility through compound circuits
While parallelism and multi-cores are receiving much attention as a major scalability path, customization is another, orthogonal and complementary, scalability path which can targ...
Sami Yehia, Sylvain Girbal, Hugues Berry, Olivier ...
ISPD
2009
ACM
141views Hardware» more  ISPD 2009»
14 years 3 months ago
A faster approximation scheme for timing driven minimum cost layer assignment
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
Shiyan Hu, Zhuo Li, Charles J. Alpert