588 search results - page 57 / 118 » Minimality Results for the Spatial Logics |
CGF
2004
13 years 8 months ago
2004
We present a simple but powerful algorithm for optimizing the usage of hardware occlusion queries in arbitrary complex scenes. Our method minimizes the number of issued queries an...
DAC
2010
ACM
13 years 3 months ago
2010
ACM
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
EUSFLAT
2009
13 years 6 months ago
2009
This paper investigates the potential information provided to the user by the uncertainty measures applied to the possibility distributions associated with the spatial units of an ...
VTS
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...