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» Minimization of an M-convex Function
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ICCAD
1999
IEEE
86views Hardware» more  ICCAD 1999»
15 years 10 months ago
Clock skew scheduling for improved reliability via quadratic programming
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
Ivan S. Kourtev, Eby G. Friedman
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
15 years 10 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...
VISUALIZATION
1998
IEEE
15 years 10 months ago
Visualization for multiparameter aircraft designs
We describe an aircraft design problem in high dimensional space, with D typically being 10 to 30. In some respects this is a classic optimization problem, where the goal is to fi...
Clifford A. Shaffer, Duane L. Knill, Layne T. Wats...
VTS
1996
IEEE
111views Hardware» more  VTS 1996»
15 years 10 months ago
Synthesis-for-scan and scan chain ordering
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
Robert B. Norwood, Edward J. McCluskey
DAC
1996
ACM
15 years 10 months ago
Test Point Insertion: Scan Paths through Combinational Logic
We propose a low-overhead scan design methodology which employs a new test point insertion technique to establish scan paths through the functional logic. The technique re-uses th...
Chih-Chang Lin, Malgorzata Marek-Sadowska, Kwang-T...