137 search results - page 7 / 28 » Minimizing power across multiple technology and design level... |
MICRO
2003
IEEE
14 years 22 days ago
2003
IEEE
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
WWW
2004
ACM
14 years 8 months ago
2004
ACM
Recent observations through experiments that we have performed in current third generation wireless networks have revealed that the achieved throughput over wireless links varies ...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
GLOBECOM
2007
IEEE
14 years 1 months ago
2007
IEEE
— In this paper, we propose a novel channel sounding technique, called the multicarrier direct sequence swept time delay cross-correlation (MC-DS-STDCC), which is designed to min...