Sciweavers

48 search results - page 8 / 10
» Minimizing the embedding impact in steganography
Sort
View
JUCS
2006
112views more  JUCS 2006»
13 years 7 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
RTAS
1996
IEEE
13 years 11 months ago
Efficient worst case timing analysis of data caching
Recent progress in worst case timing analysis of programs has made it possible to perform accurate timing analysis of pipelined execution and instruction caching, which is necessa...
Sung-Kwan Kim, Sang Lyul Min, Rhan Ha
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
14 years 1 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
ICIP
2008
IEEE
14 years 9 months ago
Managing privacy data in pervasive camera networks
Privacy protection of visual information is increasingly important as pervasive camera networks becomes more prevalent. The proposed scheme addresses the problem of preserving and...
Sen-Ching S. Cheung, Jithendra K. Paruchuri, Thinh...
TABLETOP
2008
IEEE
14 years 1 months ago
Experiences with building a thin form-factor touch and tangible tabletop
In this paper we describe extensions to our work on ThinSight, necessary to scale the system to larger tabletop displays. The technique integrates optical sensors into existing of...
Shahram Izadi, Alex Butler, Steve Hodges, Darren W...