39 search results - page 4 / 8 » Minimizing the power consumption of a Chip Multiprocessor un... |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—In this paper we propose the method of task merging and idle period clustering for dynamic power management (DPM) in a real-time system with multiple processing elements. We sho...
ISLPED
2003
ACM
14 years 26 days ago
2003
ACM
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
ISPD
2006
ACM
14 years 1 months ago
2006
ACM
The integration of retiming and simultaneous supply/threshold voltage scaling has a potential to enable more rigorous total power reduction. However, such integration is a highly ...