Sciweavers

2836 search results - page 512 / 568
» Model Checking for Software Architectures
Sort
View
132
Voted
SIMULATION
2010
178views more  SIMULATION 2010»
14 years 9 months ago
Application-level Simulation for Network Security
We introduce and describe a novel network simulation tool called NeSSi (Network Security Simulator). NeSSi incorporates a variety of features relevant to network security distingu...
Stephan Schmidt, Rainer Bye, Joël Chinnow, Ka...
ISCA
2011
IEEE
229views Hardware» more  ISCA 2011»
14 years 6 months ago
TLSync: support for multiple fast barriers using on-chip transmission lines
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
Jungju Oh, Milos Prvulovic, Alenka G. Zajic
130
Voted
CODES
2007
IEEE
15 years 9 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
128
Voted
CODES
2006
IEEE
15 years 8 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
CGO
2007
IEEE
15 years 6 months ago
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
Hyesoon Kim, José A. Joao, Onur Mutlu, Yale...