24 search results - page 3 / 5 » Model Order Reduction of Large Circuits Using Balanced Trunc... |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient generation of the mod...
ICCAD
2005
IEEE
14 years 1 months ago
2005
IEEE
— Balanced truncation (BT) model order reduction (MOR) is known for its superior accuracy and computable error bounds. Balanced stochastic truncation (BST) is a particular BT pro...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
In the paper, we develop a systematic methodology for modeling sampled interconnect frequency response data based on spline interpolation. Through piecewise polynomial interpolatio...
ICCAD
2002
IEEE
14 years 15 days ago
2002
IEEE
Numerous approaches have been proposed to address the overwhelming modeling problems that result from the emergence of magnetic coupling as a dominant performance factor for ICs a...