12 search results - page 2 / 3 » Model Order-Reduction of RC(L) Interconnect Including Variat... |
ICCAD
2007
IEEE
14 years 7 months ago
2007
IEEE
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
DAC
1999
ACM
14 years 3 months ago
1999
ACM
IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of thes...
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
Abstract-- This paper describes the stochastic model order reduction algorithm via stochastic Hermite Polynomials from the practical implementation perspective. Comparing with exis...
DATE
2008
IEEE
14 years 5 months ago
2008
IEEE
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
3DIC
2009
IEEE
14 years 5 months ago
2009
IEEE
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...