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» Model Reuse through Hardware Design Patterns
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RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
14 years 20 days ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
DAC
2000
ACM
14 years 8 months ago
Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
14 years 1 months ago
Modeling and Synthesis of Hardware-Software Morphing
— In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibil...
Dirk Koch, Christian Haubelt, Thilo Streichert, J&...
SIGCSE
2002
ACM
126views Education» more  SIGCSE 2002»
13 years 7 months ago
Design patterns for games
Designing a two-person game involves identifying the game model to compute the best moves, the user interface (the "view") to play the game, and the controller to coordi...
Dung Zung Nguyen, Stephen B. Wong
DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 11 days ago
The Modelling of Embedded Systems Using HASoC
We present a design method (HASoC) for the lifecycle modelling of embedded systems that are targeted primarily, but not necessarily, at SoC implementations. The object-oriented de...
M. D. Edwards, P. N. Green