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» Model checking transactional memories
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DATE
2009
IEEE
168views Hardware» more  DATE 2009»
14 years 4 months ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
ASE
2002
160views more  ASE 2002»
13 years 9 months ago
Proving Invariants of I/O Automata with TAME
This paper describes a specialized interface to PVS called TAME (Timed Automata Modeling Environment) which provides automated support for proving properties of I/O automata. A maj...
Myla Archer, Constance L. Heitmeyer, Elvinia Ricco...
CHI
2005
ACM
14 years 10 months ago
Work coordination, workflow, and workarounds in a medical context
In this paper we report an ethnographic study of workarounds--informal temporary practices for handling exceptions to normal workflow--in a hospital environment. Workarounds are a...
Marina Kobayashi, Susan R. Fussell, Yan Xiao, F. J...
PLDI
2010
ACM
14 years 2 months ago
Finding low-utility data structures
Many opportunities for easy, big-win, program optimizations are missed by compilers. This is especially true in highly layered Java applications. Often at the heart of these misse...
Guoqing Xu, Nick Mitchell, Matthew Arnold, Atanas ...
CODES
2006
IEEE
13 years 11 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...