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» Model-based software design tools for the cell processor
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LCTRTS
2010
Springer
14 years 2 months ago
Versatile system-level memory-aware platform description approach for embedded MPSoCs
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
Robert Pyka, Felipe Klein, Peter Marwedel, Stylian...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
14 years 26 days ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
ARCS
2009
Springer
14 years 2 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
GLVLSI
2007
IEEE
106views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Floorplan repair using dynamic whitespace management
We describe an efficient, top-down strategy for overlap removal and floorplan repair which repairs overlaps in floorplans produced by placement algorithms or rough floorplanni...
Kristofer Vorwerk, Andrew A. Kennings, Doris T. Ch...
ASPLOS
2012
ACM
12 years 3 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel