168 search results - page 2 / 34 » Modeling Assembly Instruction Timing in Superscalar Architec... |
DATE
2000
IEEE
13 years 11 months ago
2000
IEEE
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution tim...
ICCD
2000
IEEE
2000
IEEE
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
13 years 11 months ago
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
APCSAC
2005
IEEE
14 years 22 days ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
Spatial Computing (SC) has been shown to be an energy-efficient model for implementing program kernels. In this paper we explore the feasibility of using SC for more than small k...