356 search results - page 39 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
HPCA
1999
IEEE
14 years 29 days ago
1999
IEEE
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
ICPP
2009
IEEE
14 years 3 months ago
2009
IEEE
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...