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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 6 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
ASPLOS
2006
ACM
14 years 13 days ago
Efficiently exploring architectural design spaces via predictive modeling
Architects use cycle-by-cycle simulation to evaluate design choices and understand tradeoffs and interactions among design parameters. Efficiently exploring exponential-size desig...
Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R...
IPPS
1994
IEEE
14 years 25 days ago
Building Multithreaded Architectures with Off-the-Shelf Microprocessors
Present-day parallel computers often face the problems of large software Overheadsfor process switching and interprocessor communication. These problems are addressed by the Multi...
Herbert H. J. Hum, Kevin B. Theobald, Guang R. Gao
ICPP
1993
IEEE
14 years 25 days ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
VLDB
1991
ACM
143views Database» more  VLDB 1991»
14 years 6 days ago
Handling Data Skew in Multiprocessor Database Computers Using Partition Tuning
Shared nothing multiprocessor archit.ecture is known t.obe more scalable to support very large databases. Compared to other join strategies, a hash-ba9ed join algorithm is particu...
Kien A. Hua, Chiang Lee