356 search results - page 61 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
SAS
2007
Springer
14 years 2 months ago
2007
Springer
We present a new pointer analysis for use in shared memory programs running on hierarchical parallel machines. The analysis is motivated by the partitioned global address space lan...
HPCA
2006
IEEE
14 years 9 months ago
2006
IEEE
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
CODES
2003
IEEE
14 years 2 months ago
2003
IEEE
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
PVLDB
2008
13 years 8 months ago
2008
Sorting a list of input numbers is one of the most fundamental problems in the field of computer science in general and high-throughput database applications in particular. Althou...