669 search results - page 84 / 134 » Modeling Dynamic Architectures Using Nets-Within-Nets |
ISCA
2011
IEEE
13 years 2 months ago
2011
IEEE
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
CP
2007
Springer
14 years 5 months ago
2007
Springer
Visualization is often invaluable to understand the behavior of optimization algorithms, identify their bottlenecks or pathological behaviors, and suggest remedial techniques. Yet ...
ASPDAC
2004
ACM
14 years 4 months ago
2004
ACM
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
DATE
2010
IEEE
14 years 4 months ago
2010
IEEE
—Subdivision Surfaces provide a compact way to describe a smooth surface using a mesh model. They are widely used in 3D animation and nearly all modern modeling programs support ...
SPIN
2004
Springer
14 years 4 months ago
2004
Springer
The Murϕ-based Hopper tool is a general purpose explicit model checker. Hopper leverages Murϕ’s class structure to implement new algorithms. Hopper differs from Murϕ in that i...