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IPPS
2008
IEEE
14 years 1 months ago
Modeling and analysis of power in multicore network processors
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
S. Huang, Y. Luo, W. Feng
ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
13 years 11 months ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
DSD
2006
IEEE
107views Hardware» more  DSD 2006»
14 years 1 months ago
A High Level Power Model for the Nostrum NoC
We propose a power model for the Nostrum NoC. For this purpose an empirical power model of links and switches has been formulated and validated with the Synopsys Power Compiler. T...
Sandro Penolazzi, Axel Jantsch
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
14 years 4 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
SAINT
2007
IEEE
14 years 1 months ago
Local Production, Local Consumption Peer-to-Peer Architecture for a Dependable and Sustainable Social Infrastructure
Peer-to-peer (P2P) is a system of overlay networks such that participants can potentially take symmetrical roles. This translates itself into a design based on the philosophy of L...
Kenji Saito, Eiichi Morino, Yoshihiko Suko, Takaak...