The reconfigurable mesh model for massively parallel computing has recently been rediscovered and proposed as the basis of a practical many-core architecture. With this paper, we...
System-level power exploration requires tools for estimation of the overall power consumed by a system, as well as a detailed breakdown of the consumption of its main functional b...
Luca Benini, Marco Ferrero, Alberto Macii, Enrico ...
This paper describes a fast, automated technique for accurate on-line estimation of the performance and power consumption of interacting processes in a multi-programmed, multi-cor...
Xi Chen, Chi Xu, Robert P. Dick, Zhuoqing Morley M...
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...