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ISLPED
2003
ACM
77views Hardware» more  ISLPED 2003»
14 years 26 days ago
Microprocessor pipeline energy analysis
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wideissue, highly speculative cores. Microarchitectural speculation...
Karthik Natarajan, Heather Hanson, Stephen W. Keck...
TCAD
2002
104views more  TCAD 2002»
13 years 7 months ago
An instruction-level energy model for embedded VLIW architectures
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
14 years 4 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha
PATMOS
2007
Springer
14 years 1 months ago
Optimization for Real-Time Systems with Non-convex Power Versus Speed Models
Abstract. Until now, the great majority of research in low-power systems has assumed a convex power model. However, recently, due to the confluence of emerging technological and ar...
Ani Nahapetian, Foad Dabiri, Miodrag Potkonjak, Ma...
ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
13 years 12 months ago
A hybrid approach for core-based system-level power modeling
Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
Tony Givargis, Frank Vahid, Jörg Henkel