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VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 9 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
DAC
2002
ACM
14 years 9 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
MM
2003
ACM
161views Multimedia» more  MM 2003»
14 years 1 months ago
Integrated power management for video streaming to mobile handheld devices
Optimizing user experience for streaming video applications on handheld devices is a significant research challenge. In this paper, we propose an integrated power management appr...
Shivajit Mohapatra, Radu Cornea, Nikil D. Dutt, Al...
SP
2008
IEEE
120views Security Privacy» more  SP 2008»
13 years 8 months ago
Pacemakers and Implantable Cardiac Defibrillators: Software Radio Attacks and Zero-Power Defenses
Abstract--Our study analyzes the security and privacy properties of an implantable cardioverter defibrillator (ICD). Introduced to the U.S. market in 2003, this model of ICD includ...
Daniel Halperin, Thomas S. Heydt-Benjamin, Benjami...
DATE
2008
IEEE
149views Hardware» more  DATE 2008»
14 years 3 months ago
OS-Based Sensor Node Platform and Energy Estimation Model for Health-Care Wireless Sensor Networks
Accurate power and performance figures are critical to assess the effective design of possible sensor node architectures in Body Area Networks (BANs) since they operate on limite...
Francisco J. Rincón, Michele Paselli, Joaqu...