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» Modeling and evaluation of hardware software designs
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ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
14 years 1 months ago
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Ch...
SIGMETRICS
2012
ACM
283views Hardware» more  SIGMETRICS 2012»
11 years 9 months ago
Renewable and cooling aware workload management for sustainable data centers
The demand for data center computing increased significantly in recent years resulting in huge energy consumption. Data centers typically comprise three main subsystems: IT equip...
Zhenhua Liu, Yuan Chen, Cullen Bash, Adam Wierman,...
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 2 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
13 years 11 months ago
Fair watermarking techniques
Many intellectual property protection (IPP) techniques have been proposed. Their primary objectives are providing convincible proof of authorship with least degradation of the qua...
Gang Qu, Jennifer L. Wong, Miodrag Potkonjak
MSWIM
2006
ACM
14 years 1 months ago
An application-driven perspective on wireless sensor network security
Wireless sensor networks (WSNs) have recently attracted a lot of interest due to the range of applications they enable. Unfortunately, WSNs are exposed to numerous security threat...
Eric Sabbah, Adnan Majeed, Kyoung-Don Kang, Ke Liu...