8 search results - page 1 / 2 » Modeling the Overshooting Effect for CMOS Inverter Delay Ana... |
TCAD
2010
13 years 9 months ago
2010
—With the scaling of complementary metal–oxide– semiconductor (CMOS) technology into the nanometer regime, the overshooting effect due to the input-to-output coupling capacit...
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
GLVLSI
2006
IEEE
14 years 4 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
ISLPED
2009
ACM
14 years 5 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
DAC
1996
ACM
14 years 3 months ago
1996
ACM
: While delay modeling of gates with a single switching input has received considerable attention, the case of multiple inputs switching in close temporal proximity is just beginni...