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» Modeling the adoption of new network architectures
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DATE
2010
IEEE
195views Hardware» more  DATE 2010»
13 years 10 months ago
Cool MPSoC programming
Abstract--This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. Wireless multimedia terminals are among the key driver...
Rainer Leupers, Lothar Thiele, Xiaoning Nie, Bart ...
CODES
2007
IEEE
14 years 2 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
ISCA
2007
IEEE
182views Hardware» more  ISCA 2007»
14 years 1 months ago
Configurable isolation: building high availability systems with commodity multi-core processors
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...
Nidhi Aggarwal, Parthasarathy Ranganathan, Norman ...
CODES
2006
IEEE
14 years 1 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
VISUALIZATION
1992
IEEE
13 years 11 months ago
Display of Scientific Data Structures for Algorithm Visualization
algorithms as networks of modules. The data flow architecture is popular because of the flexibility of mixing calculation modules with display modules, and because of its easy grap...
William L. Hibbard, Charles R. Dyer, Brian E. Paul