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» Models of Computation for Networks on Chip
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DAC
1996
ACM
13 years 11 months ago
Sizing of Clock Distribution Networks for High Performance CPU Chips
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
Madhav P. Desai, Radenko Cvijetic, James Jensen
DAC
1998
ACM
14 years 8 months ago
Virtual Chip: Making Functional Models Work on Real Target Systems
Namseung Kim, Hoon Choi, Seungjong Lee, Seungwang ...
HOTI
2008
IEEE
14 years 2 months ago
A Network Fabric for Scalable Multiprocessor Systems
Much of high performance technical computing has moved from shared memory architectures to message based cluster systems. The development and wide adoption of the MPI parallel pro...
Nitin Godiwala, Jud Leonard, Matthew Reilly
ICPADS
2008
IEEE
14 years 2 months ago
Quarc: A Novel Network-On-Chip Architecture
This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC [16]. The Quarc scheme significantly outperforms the Spidergon NoC through balancing t...
Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
DAC
2010
ACM
13 years 11 months ago
Networks on Chips: from research to products
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
Giovanni De Micheli, Ciprian Seiculescu, Srinivasa...