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» Models of Computation for Networks on Chip
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DAC
2003
ACM
14 years 9 months ago
Death, taxes and failing chips
In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...
Chandu Visweswariah
MASCOTS
2008
13 years 10 months ago
On the Stability of Best Effort Flow Control Mechanisms in On-Chip Architectures
In this paper we present a centralized flow control scheme in NoCs in the presence of both elastic and streaming flow traffic paradigms. We model the desired Best Effort (BE) sour...
Mohammad Sadegh Talebi, Ahmad Khonsari
BMCBI
2010
136views more  BMCBI 2010»
13 years 9 months ago
The IronChip evaluation package: a package of perl modules for robust analysis of custom microarrays
Background: Gene expression studies greatly contribute to our understanding of complex relationships in gene regulatory networks. However, the complexity of array design, producti...
Yevhen Vainshtein, Mayka Sanchez, Alvis Brazma, Ma...
HPCA
2008
IEEE
14 years 9 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...