6229 search results - page 46 / 1246 » Models of Computation for Networks on Chip |
DAC
2008
ACM
14 years 9 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
VLSID
2005
IEEE
14 years 9 months ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
AAAI
2012
11 years 11 months ago
2012
Current computer involvement in adolescent social networks (youth between the ages of 11 and 17) provides new opportunities to study group dynamics, interactions amongst peers, an...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...